The metal silicide process is the standard process in the semiconductor industry. Presently, the normal flow of the metal silicide process is that as follows. Firstly, high dose ions are implanted to form source and drain. Then, a silicon dioxide film of 50 Å to 150 Å in thickness is formed. The high temperature annealing process is performed. A relatively thicker layer of silicon nitride film is formed at the surface of the silicon dioxide film. During the high temperature annealing process, the ion which is implanted into the substrate is activated, and the surface of the substrate is repaired. The relatively thicker layer of silicon nitride film is deposited. The barrier layer is etched. The etching stops at the silicon dioxide film, and the wet etching method is adopted. In this method, the lateral etch of the barrier layer is reduced. Finally, the process of metal silicide is performed.
The disadvantage of the process is that the density of the silicon dioxide film is not enough. The covering ability of the film is low. During the process of high temperature anneal, a big amount of the implanted ions are separated out from the substrate, especially for the fluorine ions which is implanted in PMOS to enhance the reliability of the device. It causes the drift of the characteristics of the device. Seriously, it even causes that the silicon dioxide film is raised by the separated ions which forms the defect of bubble and even the peeling thereof. If the silicon dioxide film is thickened, the lateral etching will become too much during the wet etching of the subsequent metal silicide barrier layer. And the side tracking of the metal silicide will also become too much. However, if the high temperature annealing process is postponed after the process of silicon nitride film, the temperature of the silicide surface will not be enough and the annealing will not be complete.
FIG. 1 is a flow chat of the process of metal silicide in the prior art. As shown in FIG. 1, the process of forming the barrier layer in the prior art comprises the steps as follows. Firstly, ion is implanted into the NMOS to form the source and drain. Then ion is implanted into the PMOS to form the source and drain, and at the same time the fluorine ion is implanted into the PMOS. A metal silicide barrier layer comprising silicon dioxide is deposited. The RTA process is performed. During the process, the fluorine ions will be separated out from the substrate. Finally, a metal silicide barrier layer comprising silicon nitride is deposited.
Chinese Patent (CN 102543716A) disclosed a method of forming the metal silicide barrier layer, the method comprises the steps as follows. A substrate comprising STI is provided. There are a first gate structure and a second gate structure disposed at two side of the substrate. The lightly doped drain source regions are located at the two side of the substrate of the first gate structure. And then, a silicon dioxide of rich silicon is deposited. Ions are implanted into the two side of the first gate structure to form a heavily doped drain and source region. A silane layer is deposited. The photoresist is coated. The photoresist is photoetched to form a first window, where the first gate structure is exposed. The silane layer is removed by dry etching method. The silicon dioxide of rich silicon which is in the first window is removed by wet etching method. Then the photoresist is removed.
Chinese Patent (CN 1190830C) discloses a method of forming the conductor comprising the metal silicide. The method at least comprises the steps as follows. A substrate which is covered by the rough semiconductor structure is provided. A silicon layer and a metal layer are formed on the semiconductor structure in sequence. A covering layer is formed onto the metal layer. A thermal treatment is performed to having the metal layer and silicon layer to react a metal silicide layer. The thermal stability of the metal silicide layer is worse than the covering layer. And then the metal silicide is transformed into several conductors comprising metal silicide by adopting the process of pattern transfer program.
Chinese Patent (CN 102176414A) discloses a method of forming metal silicide, which comprises the steps as follows. A first heating process is performed before forming the metal silicide on the silicon substrate. The remaining moisture in the silicon substrate, caused by surface washing process, is removed. The metal silicide which is close to the edge of the oxide layer isolation structure is prevented to be thinner. The low resistance metal silicide can be formed on the gate and on the small linewidth source and drain.
With widely applications of forming the metal barrier layer and the high temperature annealing in manufacturing the semiconductor, the above mentioned problem needs to be solved timely.